Design Considerations and Evaluation of a High-Speed SAR ADC
Paper i proceeding, 2018

We present design and evaluation of an asynchronous, alternating-comparator, 800MS/s SAR ADC. The comparators use continuous calibration to compensate for static input offset voltages. We use a combination of measurements and behavioural modelling to identify two possible causes of limited performance; leakage from the output drives onto the input signal, and dynamic offset voltage in the comparators.

SAR

ADC

Författare

Victor Åberg

Chalmers, Data- och informationsteknik, Datorteknik, Electronics Systems

Christian Fager

Chalmers, Mikroteknologi och nanovetenskap (MC2), Mikrovågselektronik

Lars Svensson

Chalmers, Data- och informationsteknik, Datorteknik, Electronics Systems

2018 IEEE Nordic Circuits and Systems Conference (NorCAS)
Tallinn, ,

Styrkeområden

Informations- och kommunikationsteknik

Ämneskategorier

Signalbehandling

Annan elektroteknik och elektronik

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Skapat

2018-11-01