Enhancing Multithreaded Performance of Asymmetric Multicores with SIMD Offloading
Paper i proceeding, 2020

Asymmetric multicore architectures with single-ISA can accelerate multithreaded applications by running code that does not execute concurrently (i.e., the serial region) on a big core and the parallel region on a larger number of smaller cores. Nevertheless, in such architectures the big core still implements resource-expensive application-specific instruction extensions that are rarely used while running the serial region, such as Single Instruction Multiple Data (SIMD) and Floating-Point (FP) operations. In this work, we propose a design in which these extensions are not implemented in the big core, thereby freeing up area and resources to increase the number of small cores in the system, and potentially enhance thread-level parallelism (TLP). To address the case when missing instruction extensions are required while running on the big core we devise an approach to automatically offload these operations to the execution units of the small cores, where the extensions are implemented and can be executed. Our evaluation shows that, on average, the proposed architecture provides 1.76x speedup when compared to a traditional single-ISA asymmetric multicore processor with the same area, for a variety of parallel applications.

offloading

multicore

heterogeneity

SIMD

functional unit sharing

Författare

Jeckson Dellagostin Souza

Universidade Federal do Rio Grande do Sul (UFRGS)

Madhavan Manivannan

Chalmers, Data- och informationsteknik, Datorteknik

Miquel Pericas

Chalmers, Data- och informationsteknik, Datorteknik

Antonio Carlos Schneider Beck

Universidade Federal do Rio Grande do Sul (UFRGS)

Proceedings of the 2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020

967-970 9116466
978-398192634-7 (ISBN)

2020 Design, Automation and Test in Europe Conference and Exhibition, DATE 2020
Grenoble, France,

Ämneskategorier

Datorteknik

Inbäddad systemteknik

Datorsystem

DOI

10.23919/DATE48585.2020.9116466

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Senast uppdaterat

2021-03-08