Supply Voltage Drop Study Considering On-Chip Self Inductance of a 32-bit Processor's Power Grid
Paper i proceeding, 2009

Conventional IR drop analysis suggests that on-chip inductive effects can be neglected when estimating supply voltage drops. We present a supply voltage drop analysis for a commercial 32-bit application processor. Our power grid model uses a backbone RL extracted netlist of the processor's power grid, complemented with capacitances from the processor design and a current signature defined by the worst-case switching test vector, located in the power-up sequence of the processor. Our circuit simulations show that on-chip self inductance makes the actual supply voltage drop deviate by more than 55% and 25% from the ∼6% and ∼8% drop, respectively, of nominal supply voltage that a conventional IR power grid model yields.

Författare

Daniel Andersson

Atmel Norway AS

Björn Nilsson

Chalmers, Data- och informationsteknik, Datorteknik

Johnny Pihl

Atmel Norway AS

Lars Svensson

Chalmers, Data- och informationsteknik, Datorteknik

Per Larsson-Edefors

Chalmers, Data- och informationsteknik, Datorteknik

2009 IEEE Workshop on Signal Propagation on Interconnects, SPI '09; Strasbourg; France; 12 May 2009 through 15 May 2009


978-142444489-2 (ISBN)

Ämneskategorier

Annan elektroteknik och elektronik

DOI

10.1109/SPI.2009.5089853

ISBN

978-142444489-2

Mer information

Skapat

2017-10-07