A functional programming approach to hardware acceleration of algorithms
Research Project , 2012 – 2014

The aim of this proposal is to develop methods and tools to enable large scale acceleration of algorithms using reconfigurable hardware (Field Programmable Gate Arrays, FPGAs). FPGAs currently contain resources other than just a fabric of computing elements; examples include fast carry chains, embedded DSP circuits that run much faster than the reconfigurable fabric, and embedded processors. These additional resources make FPGAs into very powerful computing platforms, but also demand sophisticated methods if they are to be efficiently exploited. Previous knowledge from the design of algorithmic blocks for implementation on full custom hardware is not simply transferrable to these augmented FPGAs. A new approach is needed; we propose one based on functional programming and search. The application areas that we aim to support demand fast data-paths, as distinct from more control oriented computations. Our driving example is fully homomorphic encryption, which was shown to be practical only in 2009. It offers the holy grail of enabling the processing of data without needing to decrypt it. Thus, it could make cloud computing secure. The downside is that current approaches make use of gigantic boolean networks, leading to the need to implement and run such circuits. This application area will provide a tough test of the programming language based circuit design methods that we propose, as well as providing the chance to have real practical impact.

Participants

Mary Sheeran (contact)

Full Professor at Software Technology (Chalmers)

Funding

Swedish Research Council (VR)

Project ID: 2011-6234
Funding Chalmers participation during 2012–2014

Publications

More information

Latest update

2021-09-17