Due to fundamental limitations of scaling at the atomic scale, coupled with heat density problems of packing an ever increasing number of transistors in a unit area, Moore’s Law has slowed down. Heterogeneity aims to solve the problems associated with the end of Moore’s Law by incorporating more specialized compute units in the system hardware and by utilizing the most efficient compute unit for each computation. However, while software-stack support for heterogeneity is relatively well developed for performance, for power- and energy-efficient computing it is severely lacking. The primary ambition of the LEGaTO project is to address this challenge by starting with a Made-in-Europe mature software stack, and optimizing this stack to support energy-efficient computing on a commercial cutting-edge European-developed CPU–GPU–FPGA heterogeneous hardware substrate and FPGA-based Dataflow Engines (DFE), which will lead to an order of magnitude increase in energy efficiency.
The main objectives of the LEGATO project are the following: - One order of magnitude improvement in energy-efficiency for heterogeneous hardware through the use of the energy-optimized programming model and runtime - Size reduction of the trusted computing base by at least an order of magnitude - 5× decrease in Mean Time to Failure through energy-efficient software-based fault tolerance. - 5× increase in FPGA designer productivity through the design of novel features for hardware design using dataflow languages
Docent vid Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Doktorand vid Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
vid Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers), Computer Systems
London, United Kingdom
Funding Chalmers participation during 2018–2021