Asynchronous protocol for data exchange between processors in RSFQ multiuser detector
Journal article, 2003

This paper describes asynchronous protocol that has been proposed for communication between processors of RSFQ Successive Interference Canceller (RSFQ SIC). The protocol is based on request-acknowledgement scheme between output accumulator and input data buffers of the processors. The experimental scheme of the protocol has been simulated and designed. Simulated frequency is 11 GHz for 1 kA/cm^2 HYPRES process with global bias current supply margins -27%/+29%, inductance margins -38%/+38%. Scheme for experimental testing of the protocol was developed, several blocks were designed and tested at low speed (30 kHz).

RSFQ

Multi user detection

Asynchronous protocol

Author

Elena Tolkacheva

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Henrik Engseth

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Irina Kataeva

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Konstantin Platov

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Anna Kidiyarova-Shevchenko

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Applied superconductivity 2003, EUCAS Sorrento, Italy.

Subject Categories

Other Engineering and Technologies not elsewhere specified

Other Electrical Engineering, Electronic Engineering, Information Engineering

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12/13/2018