Optimization of high frequency flip-chip interconnects for digital superconducting circuits
Journal article, 2006

This paper presents results of optimization of Multi-Chip-Module (MCM) contact pads and driver circuitry for gigabit chip-to-chip communication. Optimization has been done using 3D Electromagnetic (EM) simulations of flip-chip contacts and time domain simulations of drivers and receivers. A single optimized flip-chip contact has signal refection of less than -20 dB for up to 503 GHz bandwidth. The MCM data link with optimized SFQ driver, receivers and two MCM contact has operational margins on global bias current of +-30% at 30 Gbit/s speed and can operate at maximum 113 Gbit/s of operational speed. High bandwidth transmission requires realization of an advanced flip-chip process with small dimension of contact pads (less 30 micro meter) and small hight of bumps in the order of 2 micro meter. Current processes with about 7 micro meter hight of the bumps requires application of Double Flux Quantum (DFQ) driver. The data link with DFQ driver was also simulated. It has operational margins on global bias current of +-30% at 30 Gbit/s, however the maximum speed of operation is 61 Gbit/s. Several test structures have been designed for measurements signal re┬░ection, bit error rate (BER) and operational margins of the data link.

Interconnects

RSFQ

Optimization

Flip-chip

Author

Raihan Rafique

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Henrik Engseth

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Anna Kidiyarova-Shevchenko

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

Superconductor Science and Technology

0953-2048 (ISSN) 1361-6668 (eISSN)

Vol. 15 5 S354-S361

Subject Categories

Other Engineering and Technologies not elsewhere specified

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1088/0953-2048/19/5/S40

More information

Created

10/6/2017