DTail: A flexible approach to DRAM refresh management
Paper in proceeding, 2014

DRAM cells must be refreshed (or rewritten) periodically to maintain data integrity, and as DRAM density grows, so does the refresh time and energy. Not all data need to be refreshed with the same frequency, though, and thus some refresh operations can safely be delayed. Tracking such information allows the memory controller to reduce refresh costs by judiciously choosing when to refresh different rows Solutions that store imprecise information miss opportunities to avoid unnecessary refresh operations, but the storage for tracking complete information scales with memory capacity. We therefore propose a flexible approach to refresh management that tracks complete refresh information within the DRAM itself, where it incurs negligible storage costs (0.006% of total capacity) and can be managed easily in hardware or software. Completely tracking multiple types of refresh information (e.g., row retention time and data validity) maximizes refresh reduction and lets us choose the most effective refresh schemes. Our evaluations show that our approach saves 25-82% of the total DRAM energy over prior refresh-reduction mechanisms.

dram refresh

refresh management

energy saving

Author

Z. Cui

Chinese Academy of Sciences

Sally A McKee

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Z. Zha

Chinese Academy of Sciences

Y. Bao

Chinese Academy of Sciences

M. Chen

Chinese Academy of Sciences

28th ACM International Conference on Supercomputing, ICS 2014; Munich; Germany; 10 June 2014 through 13 June 2014

43-52
978-145032642-1 (ISBN)

Subject Categories

Computer and Information Science

DOI

10.1145/2597652.2597663

ISBN

978-145032642-1

More information

Latest update

10/2/2018