Symmetrical FET Modeling

Licentiate thesis, 2014

This thesis deals with empirical modeling of symmetrical Field-Effect Transistors (FETs). It covers three distinct topics within the areas of modeling and parameter extraction of microwave FETs. First, the symmetry of FET devices is addressed. Such devices are often used in transceivers as a building block for switches. These devices are intrinsically symmetrical around the gate. Hence, their source and drain terminals are interchangeable. For these devices, the extraction of small signal model parameters is addressed. It is shown that the commonly used small-signal FET model does not translate the intrinsic symmetry of the device into its equivalent circuit. Thus, a big opportunity of reducing the number of measurement points and the complexity of modeling is overlooked. Therefore, a new small-signal model is proposed to address the intrinsic symmetry present in such devices. Second, the small-signal parameters of the symmetrical model are further improved using a modified optimizer based extraction and a new error expression. This new error function improves the extraction result, and ensures that the symmetry of the device is taken into the account. Finally, the symmetrical small-signal model is extended to find the symmetry in a large-signal model. This leads to the reduction of the intrinsic model so that one current and one charge expression is sufficient to represent its nonlinear behavior. While the modeling procedure is inspired from switch FETs, commonly available devices are symmetrical except for high power transistors. Hence, the modeling procedure which is not limited to switch FETs, can be applied across various device technologies e.g., MOSFET, GaAs pHEMTs/mHEMTs, InP transistors, etc. The applications are also not limited to switches, but include resistive mixers, switch mode oscillators etc.