Degradation of the SrRuO3/SrTiO3 Interface Capacitance Induced by Mechanical Stresses
Journal article, 2014
Trilayer epitaxial heterostructures in which a 700-nm-thick SrTiO3 interlayer is integrated with two SrRuO3 electrodes have been grown by laser ablation. In the top electrode, twenty contact pads (S approximate to 0.1 mm(2)) have been formed using photolithography and ion etching. The bottom SrRuO3 electrode grown on a MgO(001) substrate is common for all film capacitors on the chip. As the temperature decreases in the range of 300-50 K, the capacitance C of the capacitors increases by a factor more than two due to an increase in the permittivity epsilon of the interlayer. At T = 4.2 K, as the bias voltage of +/-2.5 V is applied to the oxide electrodes, the capacitance C decreases by similar to 40%. In the temperature range of 100-300 K, the ratio epsilon(0)/epsilon increases almost linearly with increasing temperature (epsilon(0) is the permittivity in vacuum). At T > 250 K, the dielectric loss tangent of the SrTiO3 interlayer increases exponentially with increasing temperature and substantially depends on the bias voltage applied to the oxide electrodes.