Oscillator circuit with tuneable signal delay means
Patent, 2008

The invention discloses an oscillator circuit (100, 200, 300, 400), comprising an oscillating element (110, 210, 310, 410) and output means (115, 215, 315, 415) for outputting an oscillation frequency from the oscillating circuit. The circuit further comprises a signal delay means (120, 220, 320, 420) which is arranged in series with the oscillating element and feeds the output signal back to the oscillating element. The delay means is (120, 220, 320, 420) tuneable with respect to the delay it provides. The oscillating element can be an amplifier or a VCO, and the delay means can be a Delay Locked Loop or a tuneable delay line, depending on the embodiment of the invention.

Inventor

Harald Jacobsson

Spartak Gevorgian

Chalmers, Applied Physics, Physical Electronics

Thomas Lewin

Telefonaktiebolaget LM Ericsson

US07352253

10/581788

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

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Latest update

10/15/2018