Optimum GaN HEMT Oscillator Design Targeting Low Phase Noise

Licentiate thesis, 2015

The thesis considers design of low phase noise oscillators, given the boundary condition of the used technology. Important conditions are the power handling of the active device, device noise floor, the quality factor of the resonator, bias settings, and low frequency noise. A particular focus in this study is optimization of the coupling factor between the resonator and the active device, which is the factor that is most easy to influence for a circuit designer. Resonators have to be well matched to the active device to ensure a good performance. As a measure on oscillator design efficiency, the thesis uses an effective noise figure that is compensated for the unloaded quality factor (Q0) of the resonator and the power consumption of the active device. The active device technology in this study is a 0.25 um GaN-HEMT process. All designs are based on a device with 400 um gate periphery that is processed either as a single-die HEMT assembled in a hybrid solution discrete on PCB, or in a MMIC-implementation with the amplifying part, or the complete oscillator on chip. Low-frequency-noise (LFN) measurements are performed and benchmarked versus other GaN HEMT devices as well as InGaP HBT and GaAs HEMT. It is found that the used device presents relatively low noise in comparison to other GaN HEMTs. It is also found that power-normalized far carrier noise, e.g., @100 kHz is comparable to levels in InGaP HBT devices. Three oscillators, based on similar reflection amplifiers but different resonators, are designed. The three resonators are: an external discrete LC-resonator with Q0≈49, a quasilumped on-chip MMIC resonator, Q0≈40, and an external metal cavity, Q0≈3800. For each resonator, the impedance level is chosen to match the active device. The fabricated oscillator test beds are made flexible so that the small-signal open loop gain can be experimentally tuned. It is demonstrated that the best phase noise is reached for a smallsignal open-loop gain close to unity. A too high gain margin is normally bad from a phase noise perspective. The discrete hybrid oscillator presents a phase noise of -123 dBc/Hz@100 kHz from a 1 GHz oscillation frequency; the MMIC oscillator presents a phase noise of -106 dBc/Hz@100 kHz from a 15 GHz oscillation frequency; and the cavity based oscillator presents an excellent phase noise of -145 dBc/Hz@100 kHz from a 10 GHz oscillation frequency. Normalizing these results versus Q0 and DC-power, results in effective noise figures of 16-22 dB. The effective noise figure is identified to originate primarily in finite DC to RF power efficiency and up-converted flicker noise.