Generating Fast Multipliers Using Clever Circuits
Journal article, 2004

New insights into the general structure of partial product reduction trees are combined with the notion of clever circuits to give a novel method of writing simple but flexible and highly-parameterised data-path generators.

Author

Mary Sheeran

Chalmers, Department of Computing Science, Formal Methods

Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)

03029743 (ISSN) 16113349 (eISSN)

Vol. 3312 6-20

Subject Categories

Computer and Information Science

DOI

10.1007/978-3-540-30494-4_2

ISBN

3-540-23738-0

More information

Created

10/8/2017