A Safe and Tight Estimation of the Worst-Case Execution Time of Dynamically Scheduled Parallel Applications
Other conference contribution, 2016
real time systems
Parallel computer architecture
worst-case execution time
Author
Petros Voudouris
Chalmers, Computer Science and Engineering (Chalmers)
Risat Pathan
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Per Stenström
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
Programmability and Architectures for Heterogeneous Multicores (MULTIPROG-2016)
6-
Areas of Advance
Information and Communication Technology
Subject Categories
Computer and Information Science
Electrical Engineering, Electronic Engineering, Information Engineering