Efficient Temporal Logic Verification by Incremental Abstraction
Paper in proceeding, 2020
nonblocking verification
modular systems
temporal logic verification
Author
Bengt Lennartson
Chalmers, Electrical Engineering, Systems and control
Xudong Liang
Student at Chalmers
Mona Noori-Hosseini
Chalmers, Electrical Engineering, Systems and control
IEEE International Conference on Automation Science and Engineering
21618070 (ISSN) 21618089 (eISSN)
Vol. 2020-August 894-899 92169509781728169040 (ISBN)
Hong Kong, Hong Kong,
Subject Categories
Other Engineering and Technologies not elsewhere specified
Embedded Systems
Computer Science
DOI
10.1109/CASE48305.2020.9216950