A 15 GHz Stacked GaAs Power Amplifier For Potential 6G Application

Paper in proceeding, 2025

This paper presents a two-stage stacked power amplifier designed at 15 GHz with 24.1 dBm output power, and 25.8% power-added efficiency (PAE) based on the WIN semiconductors 0.18 um GaAs technology. The power amplifier (PA) consists of a driver PA and a stacked cell amplifier. The stacked cell, which includes a common gate (CG) transistor and a common source (CS) transistor is designed to increase the voltage swing to deliver higher output power than a single transistor. A shunt capacitor and inductor are designed between the CG and CS transistors for equal voltage swing. The chip size is 2.5 × 1.5 mm2