Interfacial control for temperature-driven hysteresis crossover in MoS2 ionotronic field-effect transistors for memory application

Journal article, 2026

Ionotronic two-dimensional (2D) field-effect transistors (FETs) have opened new pathways for modulating electronic transport by coupling of ionic and electronic degrees of freedom, giving rise to tunable hysteresis dynamics. However, achieving precise control over temperature-dependent hysteresis remains a task due to the complex, unexplored competition among ionic drift, charge trapping/detrapping, and interfacial electrochemical effects. Here, we demonstrate the modulation of carrier transport and tailoring of hysteresis dynamics in monolayer MoS2 back-gated FETs via sodium-ion (Na+) doping inside the Si/SiO2 substrate. Temperature-dependent transfer characteristics disclose a prominent, hysteresis crossover between clockwise and anticlockwise memory states. This behavior is explained by the thermal activation and redistribution of mobile Na+ ions at the MoS2/SiO2 interface, which generates a dynamic electrostatic field that strongly modulates the threshold voltage and carrier transport. Interestingly, at elevated temperatures, the anticlockwise hysteresis window exhibits rapid, pronounced widening with increasing drain voltage compared to its clockwise hysteresis, allowing precisely controllable multilevel memory states. We propose a mechanism based on slow, ion-mediated electrochemical polarization to elucidate this drain-voltage-dependent window modulation. These findings highlight the critical role of substrate ion dynamics in tuning the hysteresis memory window in ionotronic 2D FETs for high-temperature memory applications.