A 2–40 GHz three-stage GaAs variable-gain LNA with hybrid cascode-bias control

Journal article, 2026

This paper presents a wideband three-stage variable-gain low-noise amplifier (VGLNA) in 0.18-μm GaAs pHEMT technology. Gain-control is implemented through cascode gate bias modulation in the first and third stages, while the second-stage common-source (CS) amplifier delivers a fixed gain. Gain tuning is realized by adjusting the gate bias of the common-gate (CG) transistors, which shifts the drain–source voltage of the CS transistor toward its knee voltage and quasi-linearly scales its drain current and transconductance. Three gain-control strategies are investigated: adjusting the first-stage bias to enhance linearity, the third-stage bias to minimize noise degradation, and both stages simultaneously in a hybrid approach to achieve a balanced trade-off between the noise figure (NF) and linearity. The VGLNA covers 2–40 GHz and provides a gain-control range (GCR) of 20 dB. The measurement results demonstrate a maximum gain of 25 dB, with NF ranging from 2.5 to 4 dB across the entire 2–40 GHz band at high gain. The maximum output 1-dB compression point (OP1dB) was 5 dBm. The chip occupies an area of 2.4 mm², including pads, and consumes 176 mW from a 4-V supply.