Leakage current effects on C-V plots of high- k metal-oxide-semiconductor capacitors
Journal article, 2009

With the employment of ultrathin, high dielectric constant gate materials in advanced semiconductor technology, the conventional capacitance-voltage measurement technique exhibits a series of anomalies. In particular, a nonsaturating increase in the accumulation capacitance with reducing measurement frequency is frequently observed, which has not been adequately explained to our knowledge. In this article, the authors provide an explanation for this anomaly and hence set a criterion for the lower bound on measurement frequency. We then present a model which allows the easy extraction of the required parameters and apply it to an experimental set of data.

Author

Y. Lu

University of Liverpool

S. Hall

University of Liverpool

L. Z. Tan

University of Liverpool

I. Z. Mitrovic

University of Liverpool

W.M. Davey

University of Liverpool

Bahman Raeissi

Chalmers, Applied Physics, Physical Electronics

Olof Engström

Chalmers, Applied Physics, Physical Electronics

K. Cherkaoui

Tyndall National Institute at National University of Ireland, Cork

S Monaghan

Tyndall National Institute at National University of Ireland, Cork

P.K. Hurley

Tyndall National Institute at National University of Ireland, Cork

H.D.B. Gottlob

Gesellschaft fur Angewandte Mikro- und Optoelektronik mbH

M.C. Lemme

Gesellschaft fur Angewandte Mikro- und Optoelektronik mbH

Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures

21662746 (ISSN) 21662754 (eISSN)

Vol. 27 1 352-355

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1116/1.3025910

More information

Latest update

4/6/2022 5