Design and Fabrication of 0/1-Level RF-Via Interconnect for RF-MEMS Packaging Applications
Journal article, 2010

This paper presents the parametric study of RF-via (0-level) and flip-chip bump (1-level) transitions for applications of packaging coplanar RF-MEMS devices. The key parameters were found to be the bumps' and vias' positions and the overlap of the metal pads, which should be carefully considered in the entire two levels of packages. The length of the backside transmission line, determining the MEMS substrate area, showed minor influence on the interconnect performance. With the experimental results, the design rules have been developed and established. The optimized interconnect structure for the two levels of packages demonstrates the return loss beyond 15 dB and the insertion loss within 0.6 dB from dc to 60 GHz.

microwave technology

interconnections

flip-chip interconnects

Fabrication

ghz

packaging

cpw

microelectromechanical devices

Author

L. H. Hsu

National Chiao Tung University Taiwan

Chalmers

W. C. Wu

Chalmers

National Chiao Tung University Taiwan

E. Y. Chang

National Chiao Tung University Taiwan

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Y. C. Wu

National Chiao Tung University Taiwan

C. T. Wang

National Chiao Tung University Taiwan

C. T. Lee

National Cheng Kung University

IEEE Transactions on Advanced Packaging

1521-3323 (ISSN)

Vol. 33 1 30-36

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/TADVP.2009.2034137

More information

Latest update

9/10/2018