A direct conversion quadrature transmitter with digital interface in 45 nm CMOS for high-speed 60 GHz communications
Paper in proceedings, 2011

A compact 60 GHz direct conversion quadrature transmitter is designed and fabricated in 45 nm standard LP CMOS. The transmitter features an integrated power amplifier with continuous output level control and interfaces binary data signals with nominal peak-to-peak voltage swing of 300 mV. The highest measured modulation bandwidth is limited by the measurement setup to 4 GHz but is simulated to be as high as 10 GHz. In single sideband up-converting operation mode, the measured image suppression ratio is 22 dB with 36 dB of carrier suppression corresponding to approximately 8% EVM in the output signal constellation. The output RF frequency can be from 54 GHz to 66 GHz to accommodate several channels and the output power can be adjusted from -3 dBm to 10 dBm. The chip is operated from a 2 V supply and draws 180 mA current.

direct conversion

60 GHz

quadrature transmitter

45nm CMOS

differential 90° coupler

Author

Morteza Abbasi

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Torgil Kjellberg

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

A. de Graauw

NXP Semiconductors

R. Roovers

NXP Semiconductors

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium. Baltimore, 5-7 June 2011

1529-2517 (ISSN)

Areas of Advance

Information and Communication Technology

Nanoscience and Nanotechnology (2010-2017)

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/RFIC.2011.5940690

ISBN

978-142448293-1

More information

Created

10/7/2017