Admittance spectroscopy of Si/LaLuO3 and Si/GdSiO MOS Structures (Invited)
Paper in proceeding, 2012

Interface states at the gate oxide/channel of metal oxide semiconductor (MOS) transistors generally result in detrimental effects on the device performance which need to be considered for the new generations of high-k dielectrics. In this paper, the admittance of Gadolinium silicate (GdSiO) and Lanthanum Lutetium oxide (LaLuO3) MOS capacitors were investigated as a function of the signal frequency, temperature and gate voltage. The Arrhenius plots of the peak pulsations extracted from the conductance spectra have been discussed on the bases of simulated data taking into account a distribution of the trap energy levels and a thermally enhanced capture cross-section. The consequences of a peaked interface state distribution on the evolution of activation energies are shown to lead to Arrhenius plots following the Meyer-Neldel Rule.

Author

F. Ducroquet

CEA-Leti: Laboratoire d'électronique des technologies de l'information

Olof Engström

Chalmers, Microtechnology and Nanoscience (MC2), Terahertz and Millimetre Wave Laboratory

H. D. B. Gottlob

AMO

J. M. J. Lopes

Forschungszentrum Jülich

J. Schubert

Forschungszentrum Jülich

ECS Transactions

19386737 (ISSN) 19385862 (eISSN)

Vol. 45 3 103 - 117
978-156677955-5 (ISBN)

5th International Symposium on Dielectrics for Nanosystems: Materials Science, Processing, Reliability and Manufacturing - 221st ECS Meeting
Seattle, WA, USA,

Subject Categories

Nano Technology

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1149/1.3700877

More information

Latest update

5/16/2023