Capacitance arrangement and method relating thereto
Patent, 2011

A capacitance arrangement comprising at least one parallel-plate capacitor comprising a first electrode means, a dielectric layer and a second electrode means partly overlapping each other. A misalignment limit is given. Said first electrode means comprises a first and a second electrode arranged symmetrically with respect to a longitudinal axis, said first and second electrodes have a respective first edge, which face each other, are linear and parallel such that a gap is defined there between. Said second electrode means comprises a third electrode with a first section and a second section disposed on opposite sides of said gap interconnected by means of an intermediate section, which is delimited by a function depending on a first parameter and a second parameter. One of said two parameters is adapted to be selected hence allowing calculation of the other parameter to determine the shape and size of the second electrode means

Inventor

Spartak Gevorgian

Chalmers, Microtechnology and Nanoscience (MC2), Terahertz and Millimetre Wave Laboratory

Anatoli Deleniv

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Thomas Lewin

Telefonaktiebolaget L M Ericsson

US 8009406 B2

US 12/444,819

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

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Latest update

10/15/2018