RQNoC: A resilient quality-of-service network-on-chip with service redirection
Journal article, 2016

In this article, we describe RQNoC, a service-oriented Network-on-Chip (NoC) resilient to permanent faults. We characterize the network resources based on the particular service that they support and, when faulty, bypass them, allowing the respective traffic class to be redirected. We propose two alternatives for service redirection, each having different advantages and disadvantages. The first one, Service Detour, uses longer alternative paths through resources of the same service to bypass faulty network parts, keeping traffic classes isolated. The second approach, Service Merge, uses resources of other services providing shorter paths but allowing traffic classes to interfere with each other. The remaining network resources that are common for all services employ additional mechanisms for tolerating faults. Links tolerate faults using additional spare wires combined with a flit-shifting mechanism, and the router control is protected with Triple-Modular-Redundancy (TMR). The proposed RQNoC network designs are implemented in 65nm technology and evaluated in terms of performance, area, power consumption, and fault tolerance. Service Detour requires 9% more area and consumes 7.3% more power compared to a baseline network, not tolerant to faults. Its packet latency and throughput is close to the fault-free performance at low-fault densities, but fault tolerance and performance drop substantially for 8 or more network faults. Service Merge requires 22% more area and 27% more power than the baseline and has a 9% slower clock. Compared to a faultfree network, a Service Merge RQNoC with up to 32 faults has increased packet latency up to 1.5 to 2.4× and reduced throughput to 70% or 50%. However, it delivers substantially better fault tolerance, having a mean network connectivity above 90% even with 32 network faults versus 41% of a Service Detour network. Combining Serve Merge and Service Detour improves fault tolerance, further sustaining a higher number of network faults and reduced packet latency.

Network-on-chip

Quality-of-service

Fault tolerance

Author

[Person a7c0e1c8-712b-48a6-a79c-9e510420ccb0 not found]

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

[Person 274726b5-ccc0-4690-b875-6526ef4729b0 not found]

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

[Person 64162b0e-2cbc-454b-881b-f07a191a7fd7 not found]

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

[Person e4883115-d8fa-40ba-a3c9-21b929078840 not found]

Recore Systems Bv

[Person b2a97284-02fa-4c36-85f8-da0ab4cd2090 not found]

Recore Systems Bv

Transactions on Embedded Computing Systems

1539-9087 (ISSN) 15583465 (eISSN)

Vol. 15 2 Art. no. 2846097- 2846097

Subject Categories

Computer Engineering

DOI

10.1145/2846097

More information

Latest update

4/5/2022 6