A D-Band Frequency Sixtupler MMIC With Very Low DC Power Consumption
Journal article, 2016

A novel frequency sixtupler is proposed and verified experimentally. It consists of an even-order harmonics generating stage and a mixing stage to convert the 2nd and the 4th harmonics into the 6th harmonic. Transistors in those two stages operate in class-C condition, thus, the sixtupler consumes very low DC power. A proof-of-concept circuit is designed and manufactured in a 0.25 mu m InP DHBT Technology. The sixtupler delivers a maximum output power of -3.5 dBm at 121 GHz at an input power of 7 dBm. Its 3-dB bandwidth of the output power is 25 GHz in the frequency range from 100 GHz to 125 GHz. It demonstrates also more than 10 dBc rejection ratio of the unwanted harmonics in the frequency range from 110 to 125 GHz. The sixtupler consumes a DC power of only 20 mW, which to the authors knowledge, is the lowest among sixtuplers published so far. The sixtupler also achieves a state-of-the-art peak power efficiency of 1.9%.


frequency multiplier



M. Q. Bao


Rumen Kozhuharov

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

IEEE Microwave and Wireless Components Letters

1531-1309 (ISSN) 15581764 (eISSN)

Vol. 26 9 726-728 7543487

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering



More information

Latest update

4/5/2022 6