DPTC - An FPGA-Based Trace Compression
Journal article, 2020

Recording of flash-ADC traces is challenging from both the transmission bandwidth and storage cost perspectives. This work presents a configuration-free lossless compression algorithm, which addresses both limitations, by compressing the data on-the-fly in the controlling FPGA. Thus it can easily be used directly in front-end electronics. The method first computes the differences between consecutive samples in the traces, thereby concentrating the most probable values around zero. The values are then stored as groups of four, with only the necessary least-significant bits in a variable-length code, packed in a stream of 32-bit words. To evaluate the efficiency, the storage cost of compressed traces is modeled as a baseline cost including ADC noise, and a cost for pulses that depends on amplitude and width. The free parameters and the validity of the model are determined by compressing artificial traces with varying characteristics. The compression method was also applied to actual data from different types of detectors. A typical storage cost is around 4 to 5 bits per sample. Code for the FPGA implementation in VHDL and for the CPU decompression routine in C are available as open source software, both able to operate at speeds of 400 Msamples/s.

data compression

Analog-to-digital conversion (ADC)

Central Processing Unit

data acquisition

VHDL

VHDL

Data compression

Detectors

real-time data acquisition

Bandwidth

lossless compression

open source

Field programmable gate arrays

variable-length code

front-end electronics

field programmable gate array (FPGA)

Encoding

Author

Giovanni Bruni

Chalmers, Physics, Subatomic and Plasma Physics

Håkan T Johansson

Chalmers, Physics, Subatomic, High Energy and Plasma Physics

IEEE Transactions on Circuits and Systems I: Regular Papers

1549-8328 (ISSN) 15580806 (eISSN)

Vol. 67 1 189-197 8876871

Subject Categories

Probability Theory and Statistics

Control Engineering

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/TCSI.2019.2945179

More information

Latest update

4/5/2022 7