20 GHz Power Amplifier Design in 130 nm CMOS
Paper in proceeding, 2008

Five different 20 GHz power amplifiers in 130 nm CMOS technology have been designed and characterized. The power amplifiers explore single versus cascode configuration, smaller versus larger transistor sizes, as well as the combination of two amplifiers using power splitters/combiners. A maximum output power of 63 mW at 20 GHz was achieved. Transistor level characterization using load pull measurements on 1 mm gate width transistors yielded 148 mW output power. These numbers are, to the authors? knowledge, the highest reported for CMOS above 10 GHz. Transistor modeling and layout for power amplifiers are also discussed.

Author

Mattias Ferndahl

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

T. Johansson

Huawei

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

2008 European Microwave Integrated Circuit Conference, EuMIC 2008; Amsterdam; Netherlands; 27 October 2008 through 31 October 2008

254-257
978-287487007-1 (ISBN)

Subject Categories

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/EMICC.2008.4772277

ISBN

978-287487007-1

More information

Latest update

4/13/2021