European Packaging for highly Integrated Circuits for Reliable Electronics (EPICURE)
Research Project, 2023
– 2027
State of the art high performance electronics are at the heart of nearly all defence products. However, the specificities of these products do
not allow a straightforward use of civilian electronics. Therefore, mastering advanced packaging technologies and architectures is key to
produce world-class defence products. EPICURE aims at giving Europe the means to master its future in advanced packaging. EPICURE
will generate and integrate knowledge in advanced packaging technologies and architectures, perform the related studies and designs and prepare the supply chains to offer integration solution compatible with severe defence constraints and low volume production. New trends in integration beyond Moore law are based on Heterogeneous Integration. EDA and DG studies have confirmed the need to develop advanced packaging technologies and shared Outsourced Semiconductor Assembly and Test services (OSAT) in Europe, as the most advanced technologies are located in Far East or in US and are not accessible or under usage restriction. The project will analyze use cases requirements and constraints, and combine these towards modular architectures based on future chiplets. Elementary technological bricks such as advanced substrate down to 15μm L/S, wafer level packaging, Die to Die interconnect IP will be developed to build a “packaging toolbox”. Design engineering concerns will be addressed to identify the design flow, the design and assembly rules to build a “Physical Design Kit”. Five technology demonstrators will be designed, manufactured and tested to prequalify the toolbox. The aim is to develop in Europe OSAT and technology providers in the field of advanced packaging serving defence needs. These ambitious goals are
achievable because the partners will bring advanced technologies i.e. advanced wafer level packaging from IZM, die-to-die interconnect
from Extoll, new interposer for RF from UMS, heterogeneous integration packaging and test from Synergie CAD.
Participants
Niklas Rorsman (contact)
Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics
Collaborations
Elt Elettronica Group
Rom, Italy
Extoll GmbH
Mannheim, Germany
Fraunhofer-Gesellschaft Zur
Munchen, Germany
Hensoldt Sensors GMBH
Ulm, Germany
INDRA SISTEMAS SA (INDRA)
Madrid, Spain
Kongsberg Gruppen
Kongsberg, Norway
Leonardo - Societa per azioni
Roma, Italy
Nammo
Raufoss, Norway
Norwegian Defence Research Establishment (FFI)
Lillestrøm, Norway
SINTEF Energi
Trondheim, Norway
Saab
Stockholm, Sweden
Safran
Paris, France
Synergie Cad
Carros, France
Thales Avionics Electrical Systems SAS
Chatou, France
United Monolithic Semiconductors (UMS)
Ulm, Germany
United Monolithic Semiconductors (UMS)
Ulm, Germany
Universita degli studi di Pavia
Pavia, Italy
University of Rome Tor Vergata
Rom, Italy
Funding
European Commission (EC)
Project ID: EC/HE/101121426
Funding Chalmers participation during 2023–2027