A broadband differential cascode power amplifier in 45 nm CMOS for high-speed 60 GHz system-on-chip
Paper in proceedings, 2010

A compact two-stage differential cascode power amplifier is designed and fabricated in 45 nm standard LP CMOS. The cascode configuration, with the common gate device placed in a separate P-well, provides reliable operating condition for the devices. The amplifier shows 20 dB small-signal gain centered at 60 GHz with a flat frequency response and 1-dB bandwidth of 10 GHz. The broadband large-signal operation is also ensured by providing constant load resistance to both stages over the entire band and coupling them with a dual resonance matching network. The chip delivers 11.2 dBm output power at 1-dB compression and up to 14.5 dBm power in saturation. The power amplifier operates with 2 V supply and draws 90 mA total current which results in 14.4% maximum PAE. The output third order intercept point is measured to be 18 dBm for two-tone measurement at 60 GHz with 0.5 GHz, 1 GHz and 2 GHz frequency separations. © 2010 IEEE.

Cascode

Isolated P-well

Power amplifier

45nm CMOS

60 GHz

Author

Morteza Abbasi

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Torgil Kjellberg

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Anton J. M. De Graauw

NXP Semiconductors

R. Roovers

NXP Semiconductors

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

2010 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2010; Anaheim, CA; 23 May 2010 through 25 May 2010

1529-2517 (ISSN)

978-142446242-1-

Subject Categories

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/RFIC.2010.5477384

ISBN

978-142446242-1

More information

Latest update

7/29/2019