Introduction to the fifth workshop on dependable and secure nanocomputing

Paper in proceeding, 2011

Nanocomputing and related-enabling technologies hold the promise of higher performance and lower power consumption, as well as increased communication capabilities and functionality. In addition to the impact on today computerized systems, nanocomputing is an essential lever to foster the emerging cyberphysical system paradigm. However, the dependability and security of these unprecedentedly small devices, of their deployment, and of their interconnection remain uncertain. The main sources of concern are: Nanometer devices are expected to be highly sensitive to process variations. The guard-bands used today for avoiding the impact of such variations will not represent a feasible solution in the future. As a consequence, timing errors and their higher frequency of occurrence have to be addressed. New and intricate failure modes, specific to new materials, are expected to raise serious challenges to the design and test engineers. Environment induced errors, such as single event upsets (SEU), are likely to occur more frequently than in the case of more conventional semiconductor devices. Design of hardware architectures encompassing resilience techniques are needed to achieve the development of highly reliable energy efficient systems. The increased complexity of the systems based on nanotechnology will require improved computer aided design (CAD) tools, as well as better validation techniques. The security of nanocomputing systems may be threatened by malicious attacks targeting new vulnerable areas in the hardware.