Design principles for synthesizable processor cores
Paper in proceeding, 2012
pipelining
Pipe linings
Computer architecture
Architecture
Field programmable gate arrays (FPGA)
Benchmarking
Processor architectures
Design Principles
Processor cores
FPGA implementations
synthesizable processor core
Embedded software
System clock
FPGA
Embedded computing
predication
Pipeline processing systems
Pipeline stall
FPGA architectures
Author
P. Schleuniger
Technical University of Denmark (DTU)
Sally A McKee
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
S. Karlsson
Technical University of Denmark (DTU)
Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
03029743 (ISSN) 16113349 (eISSN)
Vol. 7179 LNCS 111-122978-364228292-8 (ISBN)
Subject Categories
Computer and Information Science
DOI
10.1007/978-3-642-28293-5_10
ISBN
978-364228292-8