Dataflow Computing with Polymorphic Registers
Paper in proceeding, 2013

Heterogeneous systems are becoming increasingly popular for data processing. They improve performance of simple kernels applied to large amounts of data. However, sequential data loads may have negative impact. Data parallel solutions such as Polymorphic Register Files (PRFs) can potentially accelerate applications by facilitating high speed, parallel access to performance-critical data. Furthermore, by PRF customization, specific data path features are exposed to the programmer in a very convenient way. PRFs allow additional control over the registers dimensions, and the number of elements which can be simultaneously accessed by computational units. This paper shows how PRFs can be integrated in dataflow computational platforms. In particular, starting from an annotated source code, we present a compiler-based methodology that automatically generates the customized PRFs and the enhanced computational kernels that efficiently exploit them.

dataflow computing

Field programmable gate arrays

polymorphic register files

compiler-based methodology

Author

Catalin Ciobanu

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Georgi Gaydadjiev

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Christian Pilato

Polytechnic University of Milan

Donatella Sciuto

Polytechnic University of Milan

International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013

314 - 321 6621140
978-1-4799-0103-6 (ISBN)

Facilitating Analysis and Synthesis Technologies\nfor Effective Reconfiguration (FASTER)

European Commission (EC) (EC/FP7/287804), 2011-09-01 -- 2014-11-30.

Subject Categories

Computer Engineering

Embedded Systems

Computer Systems

Areas of Advance

Information and Communication Technology

DOI

10.1109/SAMOS.2013.6621140

ISBN

978-1-4799-0103-6

More information

Latest update

3/29/2018