Georgi Gaydadjiev
Showing 39 publications
Towards Accurate RISC-V Full System Simulation via Component-Level Calibration
Bit-flip aware control-flow error detection
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults
Low-cost software control-flow error recovery
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
Towards Scalable Arithmetic Units with Graceful Degradation
Towards domain-specific Instruction-Set Generation
Effective reconfigurable design: The FASTER approach
Crystal: A design-time resource partitioning method for hybrid main memory
A Design-Time Resource Partitioning Method for Hybrid Main Memory
Foreword - Energy-Efficient Fault-Tolerant Systems
Towards code safety with high performance
DeSyRe: On-demand adaptive and reconfigurable fault-tolerant SoCs
EUROSERVER: Energy efficient node for European micro-servers
FPGA-based design using the FASTER toolchain: The case of STM spear development board
An improved system approach towards future cochlear implants
DeSyRe: On-demand system reliability
Addressing GPU on-chip shared memory bank conflicts using elastic pipeline
Dataflow Computing with Polymorphic Registers
Separable 2D Convolution with Polymorphic Register Files
Custom architecture for multicore audio Beamforming systems
Compiler-Aided Methodology for Low Overhead On-line Testing
FASTER run-time reconfiguration management
High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding
Architecture-level fault-tolerance for biomedical implants
Efficient datapath merging for the overhead reduction of run-time reconfigurable systems
A Hybrid Main Memory Systems Taxonomy
Smart technologies for effective reconfiguration: The FASTER approach
Novel design methods and a tool flow for unleashing dynamic reconfiguration
The DeSyRe Project: On-Demand System Reliability
FASTER: Facilitating analysis and synthesis technologies for effective reconfiguration
Scalability study of polymorphic register files
On implementability of polymorphic register files
On improved MANET network utilization
Implementation study of FFT on multi-lane vector processors
Reconfigurable Acceleration and Dynamic Partial Self-Reconfiguration in General Purpose Computing
HiPEAC: Upcoming Challenges in Reconfigurable Computing
High-Performance Embedded Architecture and Compilation Roadmap
Download publication list
You can download this list to your computer.
Filter and download publication list
As logged in user (Chalmers employee) you find more export functions in MyResearch.
You may also import these directly to Zotero or Mendeley by using a browser plugin. These are found herer:
Zotero Connector
Mendeley Web Importer
The service SwePub offers export of contents from Research in other formats, such as Harvard and Oxford in .RIS, BibTex and RefWorks format.