Georgi Gaydadjiev
Visar 38 publikationer
FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
Bit-flip aware control-flow error detection
A non-conservative software-based approach for detecting illegal CFEs caused by transient faults
Low-cost software control-flow error recovery
Towards Scalable Arithmetic Units with Graceful Degradation
A Design-Time Resource Partitioning Method for Hybrid Main Memory
FPGA-based design using the FASTER toolchain: The case of STM spear development board
Towards domain-specific Instruction-Set Generation
Effective reconfigurable design: The FASTER approach
EUROSERVER: Energy efficient node for European micro-servers
DeSyRe: On-demand adaptive and reconfigurable fault-tolerant SoCs
Foreword - Energy-Efficient Fault-Tolerant Systems
Crystal: A design-time resource partitioning method for hybrid main memory
Towards code safety with high performance
Separable 2D Convolution with Polymorphic Register Files
Addressing GPU on-chip shared memory bank conflicts using elastic pipeline
Dataflow Computing with Polymorphic Registers
Compiler-Aided Methodology for Low Overhead On-line Testing
Custom architecture for multicore audio Beamforming systems
An improved system approach towards future cochlear implants
DeSyRe: On-demand system reliability
High-speed Binary Signed-Digit RNS adder with posibit and negabit encoding
FASTER run-time reconfiguration management
On implementability of polymorphic register files
On improved MANET network utilization
A Hybrid Main Memory Systems Taxonomy
Implementation study of FFT on multi-lane vector processors
FASTER: Facilitating analysis and synthesis technologies for effective reconfiguration
The DeSyRe Project: On-Demand System Reliability
Architecture-level fault-tolerance for biomedical implants
Smart technologies for effective reconfiguration: The FASTER approach
Novel design methods and a tool flow for unleashing dynamic reconfiguration
Efficient datapath merging for the overhead reduction of run-time reconfigurable systems
Scalability study of polymorphic register files
HiPEAC: Upcoming Challenges in Reconfigurable Computing
Reconfigurable Acceleration and Dynamic Partial Self-Reconfiguration in General Purpose Computing
High-Performance Embedded Architecture and Compilation Roadmap
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