DeSyRe: On-demand system reliability
Artikel i vetenskaplig tidskrift, 2013

The DeSyRe project builds on-demand adaptive and reliable Systems-on-Chips (SoCs). As fabrication technology scales down, chips are becoming less reliable, thereby incurring increased power and performance costs for fault tolerance. To make matters worse, power density is becoming a significant limiting factor in SoC design, in general. In the face of such changes in the technological landscape, current solutions for fault tolerance are expected to introduce excessive overheads in future systems. Moreover, attempting to design and manufacture a totally defect-/fault-free system, would impact heavily, even prohibitively, the design, manufacturing, and testing costs, as well as the system performance and power consumption. In this context, DeSyRe delivers a new generation of systems that are reliable by design at well-balanced power, performance, and design costs. In our attempt to reduce the overheads of fault-tolerance, only a small fraction of the chip is built to be fault-free. This fault-free part is then employed to manage the remaining fault-prone resources of the SoC. The DeSyRe framework is applied to two medical systems with high safety requirements (measured using the IEC 61508 functional safety standard) and tight power and performance constraints.

Reconfigurable hardware



Medical systems


Ioannis Sourdis

Chalmers, Data- och informationsteknik, Datorteknik

C. Strydis

A. Armato


C. S. Bouganis

Imperial College London

B. Falsafi

Ecole Polytechnique Federale de Lausanne (EPFL)

Georgi Gaydadjiev

Chalmers, Data- och informationsteknik, Datorteknik

S. Isaza

Alirad Malek

Chalmers, Data- och informationsteknik, Datorteknik

R. Mariani


Dionisios N. Pnevmatikatos

Polytechnion Kritis

Idryma Technologias kai Erevnas (FORTH)

D.K. Pradhan

University of Bristol

G.K. Rauwerda

Recore Systems Bv

R.M. Seepers

R.A. Shafik

University of Bristol

K. Sunesen

Recore Systems Bv

D. Theodoropoulos

Idryma Technologias kai Erevnas (FORTH)

Stavros Tzilis

Chalmers, Data- och informationsteknik, Datorteknik

M. Vavouras

Imperial College London

Microprocessors and Microsystems

0141-9331 (ISSN)

Vol. 37 8 981-1001





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