FASTER: Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration
Artikel i vetenskaplig tidskrift, 2015

The FASTER (Facilitating Analysis and Synthesis Technologies for Effective Reconfiguration) EU FP7 project, aims to ease the design and implementation of dynamically changing hardware systems. Our motivation stems from the promise reconfigurable systems hold for achieving high performance and extending product functionality and lifetime via the addition of new features that operate at hardware speed. However, designing a changing hardware system is both challenging and time-consuming. FASTER facilitates the use of reconfigurable technology by providing a complete methodology enabling designers to easily specify, analyze, implement and verify applications on platforms with general-purpose processors and acceleration modules implemented in the latest reconfigurable technology. Our tool-chain supports both coarse- and fine-grain FPGA reconfiguration, while during execution a flexible run-time system manages the reconfigurable resources. We target three applications from different domains. We explore the way each application benefits from reconfiguration, and then we asses them and the FASTER tools, in terms of performance, area consumption and accuracy of analysis.

Dynamic reconfiguration

Partial reconfiguration

Micro-reconfiguration

Verification

Runtime system

Reconfigurable computing

Författare

Dionisios N. Pnevmatikatos

Foundation for Research and Technology Hellas (FORTH)

Kyprianos D. Papadimitriou

Foundation for Research and Technology Hellas (FORTH)

T. Becker

Imperial College London

P. Bohm

Imperial College London

A. Brokalakis

Synelixis Solutions

K. Bruneel

Universiteit Gent

Catalin Ciobanu

Chalmers, Data- och informationsteknik, Datorteknik

T. Davidson

Universiteit Gent

Georgi Gaydadjiev

Chalmers, Data- och informationsteknik, Datorteknik

K. Heyse

Universiteit Gent

W. Luk

Imperial College London

X. Niu

Imperial College London

Ioannis Papaefstathiou

Synelixis Solutions

D. Pau

STMicroelectronics, Geneva

O. Pell

Maxeler Technologies

Christian Pilato

Politecnico di Milano

M. D. Santambrogio

Politecnico di Milano

Donatella Sciuto

Politecnico di Milano

D. Stroobandt

Universiteit Gent

T. Todman

Imperial College London

E. Vansteenkiste

Universiteit Gent

Microprocessors and Microsystems

0141-9331 (ISSN)

Vol. 39 4-5 321-338

Facilitating Analysis and Synthesis Technologies\nfor Effective Reconfiguration (FASTER)

Europeiska kommissionen (FP7), 2011-09-01 -- 2014-11-30.

Ämneskategorier

Datavetenskap (datalogi)

DOI

10.1016/j.micpro.2014.09.006