Towards Accurate RISC-V Full System Simulation via Component-Level Calibration
Journal article, 2025
Architectural simulator
full-system (FS) simulation
performance validation
Author
Karan Pathak
HEIG-VD
Delft University of Technology
Swiss Federal Institute of Technology in Lausanne (EPFL)
Joshua Klein
Swiss Federal Institute of Technology in Lausanne (EPFL)
Giovanni Ansaloni
Swiss Federal Institute of Technology in Lausanne (EPFL)
Said Hamdioui
Delft University of Technology
Georgi Gaydadjiev
Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)
University of Gothenburg
Delft University of Technology
Marina Zapater
Swiss Federal Institute of Technology in Lausanne (EPFL)
HEIG-VD
David Atienza
Swiss Federal Institute of Technology in Lausanne (EPFL)
Transactions on Embedded Computing Systems
1539-9087 (ISSN) 15583465 (eISSN)
Vol. 24 4 57Subject Categories (SSIF 2025)
Computer Systems
DOI
10.1145/3737876