Behavioral modeling of outphasing amplifiers considering memory effects
Paper in proceedings, 2013

This paper proposes a behavioral model structure for outphasing amplifiers. The model performance is evaluated on a class-D CMOS outphasing amplifier and compared with two models found in the literature. The proposed model structure also allows the use of memory in a parallel Hammerstein-like setting. The proposed models show improvements in adjacent channel error power ratio (ACEPR) of approximately 5 dB in addition to being linear in the parameters. The lower model errors enable the use and design of improved predistorters taking frequency dependency (memory effects) in outphasing amplifiers into account.

predistortion

Power amplifier

CMOS

nonlinear distortion

Author

Per Landin

GigaHertz Centre

Chalmers, Signals and Systems, Communication and Antenna Systems, Communication Systems

Thomas Eriksson

Chalmers, Signals and Systems, Communication and Antenna Systems, Communication Systems

GigaHertz Centre

Jonas Fritzin

Linköping University

Ericsson

Atila Alvandpour

Linköping University

IEEE MTT-S International Microwave Symposium Digest

0149645X (ISSN)

1-4 6697764

Subject Categories

Signal Processing

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1109/MWSYM.2013.6697764

More information

Latest update

12/28/2018