Sleep-Mode Circuit Techniques in the Presence of Gate Leakage
Licentiate thesis, 2004


Author

Mindaugas Drazdziulis

Chalmers, Department of Computer Engineering, Integrated Electronic Systems

Evaluation of Power Cut-Off Techniques in the Presence of Gate Leakage

2004 IEEE International Symposium on Cirquits and Systems - Proceedings; Vancouver, BC; Canada; 23 May 2004 through 26 May 2004,; (2004)p. II745-II748

Paper in proceedings

A Power Cut-Off Technique for Gate Leakage Suppression

European Solid-State Circuits Conference (ESSCIRC),; (2004)p. 171-174

Paper in proceedings

A Gate Leakage Reduction Strategy for Future CMOS Circuits

Proceedings of the 29th European Solid-State Circuits Conference, ESSCIRC 2003, Estoril, 16-18 September 2003,; (2003)p. 317-320

Paper in proceedings

Subject Categories

Other Electrical Engineering, Electronic Engineering, Information Engineering

Technical report L - School of Computer Science and Engineering, Chalmers University of Technology: 32

More information

Created

10/7/2017