The Use of Inverse Layout Trees for Hierarchical Design Rule Checking
Paper in proceeding, 1988
Machinery
Geometry
Tree data structures
Very large scale integration
Distributed computing
High performance computing
Wires
Solid state circuits
Author
Nils Hedenstierna
Department of Solid State Electronics
Kjell Jeppson
Department of Microelectronics and Nanoscience
Department of Solid State Electronics
IEEE International Conference on Computer-Aided Design ICCAD
0738-100X (ISSN)
Vol. 1988 534-5370-89791-310-8 (ISBN)
Subject Categories
Electrical Engineering, Electronic Engineering, Information Engineering
DOI
10.1145/74382.74467