Carbon Based Materials Synthesis and Characterization for 3D Integrated Electronics

Doctoral thesis, 2017

3D IC packaging technology extends Moore’s law and shifts the IC field into a new generation of smaller, but more powerful devices. Interconnection and thermal management as two critical parts of 3D IC integration packaging, are facing harsh challenges due to the miniaturization of IC devices. This thesis focuses on improving the heat dissipation effect and interconnect performance for 3D IC integration packaging by developing carbon based nanomaterials. Thermal management has been identified by the semiconductor industry as one of the major technological bottlenecks to hinder the further miniaturization of 3D IC devices, particularly in high power devices. The first part of thesis presents a comprehensive thermal management solution including nanocomposite thermal interface material (Nano-TIM), hexagonal boron nitride (hBN) heat spreader and graphene-CNT (G-CNT) hybrid heatsink to address heat issue existing in high power IC devices. To decrease the thermal interface resistance, a smart Nano-TIM is developed through combining a silver-coated nanofiber network and an indium matrix. The matrix contributes to the heat conduction, while the nanofiber network defines the geometry and improves the mechanical performance. The thermal and mechanical performance of Nano-TIM is demonstrated in die attach applications in IC packaging. In addition to improve thermal interface resistance by Nano-TIM, an hBN heat spreader was synthesized by liquid exfoliation method to spread and dilute the heat energy generated in power chip for further cooling. This spreader potentially broadened the heat spreader application scenario in IC packaging due to its insulating performance. Moreover, in order to dissipate heat energy from IC microsystem, a 3D carbon based heat sink consisted of CNTs and graphene was synthesized using CVD method. The carbon based heat sink combining 1D CNTs with 2D graphene extended the excellent thermal property to three dimensions through covalent bonding. In the second part of thesis, it is devoted to the development of CNT-based through silicon vias (TSVs) for interconnects in 3D IC packaging. Vertically aligned carbon nanotubes (VA-CNTs) with different structures were synthesized by the thermal chemical vapor deposition (TCVD) method. In order to address the incompatibility with IC manufacturing processes and relatively lower electrical conductivity than metal, a series of processes including tape assisted transfer, filling solder balls into hollow structures and electroplating Cu into CNTs bundles were developed. Accordingly, different types of CNT-based TSVs were fabricated: densified VA-CNT TSV, VA-CNT-Solder TSV and VA-CNT-Cu TSV. The electrical conductivity performance of the TSVs was measured using the four-probe method. Among these different kinds of TSVs, VA-CNT-Cu TSV exhibits the best conductivity, around the same order of magnitude as copper. Meanwhile, the CTE of this kind of TSV is as low as that of silicon substrate, which can effectively decrease thermal stress of the interface between via and substrate. In addition, to broaden the TSV application scenario, a flexible CNT interconnect system was integrated to demonstrate potential carbon based application in future wearable microelectronics.   In addition, CNT-G material was developed for carbon based supercapacitors application, thanks to the huge surface area and high electrical conductivity of the CNT-G hybrid material. The results indicate a superior rate capability of the CNT-G material. This carbon hybrid material exhibited a great promise for supercapacitor applications particularly in high current density. In summary, integrating the Nano-TIM, heat spreader and G-CNT heatsink together offered a comprehensive thermal management solution for 3D IC microsystem using carbon based materials. Carbon based TSV technology further shortens interconnection path and enhanced 3D IC integration. To some extent, these findings offer a potential solution for the further miniaturization of 3D IC microsystem.