Process Optimization of Passive Matrix GaN-Based Micro-LED Arrays for Display Applications
Journal article, 2019

Passive matrix GaN-based micro light-emitting diode (LED) arrays with two resolutions of 32 × 32 and 128 × 64 are designed and fabricated, and a micro control unit is used to drive the devices and display Chinese characters. The process of the micro-LED display arrays is systematically optimized, where emphasis has been put on solving two specific technical problems. First, the deep isolation trench is etched in two steps in order to decrease the slope of the isolation trench so as to ease the p electrode to “climb”. In this way, the otherwise easily broken p metal line is now very reliable. Second, a secondary growth method is employed to deposit SiO2 onto the n metal line as an insulation layer between the p and n electrode layers. Between the two deposition steps, the chips are rotated with a certain angle. Therefore, the probability of pinhole overlap is significantly reduced, and the insulation between the p and n electrode layers is guaranteed. Using the optimized micro-LED process, micro displays are fabricated and their electrical, optical, and thermal characteristics for two different pixel sizes are analyzed. Experiments show that the process optimization above helps realize the outstanding properties of the micro-LED display arrays, increase the device and system reliability. The work will contribute to the implementation of the GaN based micro-LED technologies in real life.

process optimization

passive matrix

GaN micro-LED

micro display

Author

W. L. Guo

Beijing University of Technology

Jianpeng Tai

Beijing University of Technology

Jianpeng Liu

Beijing University of Technology

Jie Sun

Beijing University of Technology

Chalmers, Microtechnology and Nanoscience (MC2), Quantum Device Physics

Journal of Electronic Materials

0361-5235 (ISSN)

Vol. 48 8 5195-5202

Subject Categories

Textile, Rubber and Polymeric Materials

Other Materials Engineering

Other Electrical Engineering, Electronic Engineering, Information Engineering

DOI

10.1007/s11664-019-07330-3

More information

Latest update

11/28/2019