A 135–183GHz Frequency Sixtupler in 250nm InP HBT
Paper in proceeding, 2020

A technique to design a broadband two-stage frequency tripler is proposed. The 1 st and the 2 nd harmonics obtained from the first stage are mixed in the second stage, getting the 3 rd harmonic. Between the two stages, there is a two-pole filter which lets the amplitude of the 1 st harmonic increase and the amplitude of the 2 nd harmonic decrease when the frequency increases. Consequently, a large 1 st harmonic is always mixed with a small 2 nd harmonic, and vice versa, which equalizes the amplitude of the mixing product, i.e., the 3 rd harmonic, over a large bandwidth. Together with a frequency doubler and a buffer amplifier, this frequency tripler is used in a frequency sixtupler. A proof-of-concept circuit is designed and implemented in 250 nm indium phosphide (InP) double-heterojunction bipolar transistor (DHBT) technology. For an input power of 6.3 dBm, the sixtupler has an output power between 0 dBm to 4.6 dBm in the output frequency range from 135 GHz to 183 GHz. It exhibits up to 13 dBc rejection ratio of the undesired 4 th , 5 th , and 7th harmonics. The sixtupler consumes a dc power of 100 mW, and achieves a peak power efficiency of 2.5%.

frequency multiplier





Mingquan Bao


Thi Ngoc Do Thanh

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Dan Kuylenstierna

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics

Herbert Zirath

Chalmers, Microtechnology and Nanoscience (MC2), Microwave Electronics


IEEE MTT-S International Microwave Symposium Digest

0149645X (ISSN)

Vol. 2020 480-483 9223798
9781728168159 (ISBN)

2020 IEEE/MTT-S International Microwave Symposium (IMS)
Los Angeles, USA,

Areas of Advance

Information and Communication Technology


Kollberg Laboratory

Subject Categories


Signal Processing

Other Electrical Engineering, Electronic Engineering, Information Engineering



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