Real-time semantic segmentation on FPGAs for autonomous vehicles with hls4ml
Journal article, 2022
In this paper, we investigate how field programmable gate arrays can serve as hardware accelerators for real-time semantic segmentation tasks relevant for autonomous driving. Considering compressed versions of the ENet convolutional neural network architecture, we demonstrate a fully-on-chip deployment with a latency of 4.9 ms per image, using less than 30% of the available resources on a Xilinx ZCU102 evaluation board. The latency is reduced to 3 ms per image when increasing the batch size to ten, corresponding to the use case where the autonomous vehicle receives inputs from multiple cameras simultaneously. We show, through aggressive filter reduction and heterogeneous quantization-aware training, and an optimized implementation of convolutional layers, that the power consumption and resource utilization can be significantly reduced while maintaining accuracy on the Cityscapes dataset.
machine learning
computer vision
hls4ml
deep learning
autonomous vehicles
FPGA
semantic segmentation
Author
Nicolo Ghielmetti
CERN
Polytechnic University of Milan
Vladimir Loncar
University of Belgrade
CERN
Maurizio Pierini
CERN
Marcel Roed
University of Oxford
CERN
Sioni Summers
CERN
Thea Aarrestad
Swiss Federal Institute of Technology in Zürich (ETH)
Christoffer Petersson
Chalmers, Mathematical Sciences, Algebra and geometry
Hampus Linander
University of Gothenburg
Jennifer Ngadiuba
Fermi National Accelerator Laboratory
Kelvin Lin
University of Washington
Amazon
Philip Harris
Massachusetts Institute of Technology (MIT)
MACHINE LEARNING-SCIENCE AND TECHNOLOGY
2632-2153 (eISSN)
Vol. 3 4 045011Subject Categories
Computer Engineering
Communication Systems
Computer Vision and Robotics (Autonomous Systems)
DOI
10.1088/2632-2153/ac9cb5