Compile-time and Runtime Autotuning for Performance Portability in a Single-Source Programming Models
Licentiate thesis, 2026

Modern computing systems combine diverse CPU and GPU architectures. Single-source programming models such as SYCL aim to reduce the software-
engineering burden of targeting these systems by allowing host and device code to be expressed in a common C++ program. Source-code portability,
however, does not guarantee performance portability. The achieved performance depends on the mapping of the programming model to the target architecture, the compiler and compilation flow, the runtime backend, and the parameters used during compilation and execution.

This thesis investigates two complementary aspects of this problem. First, it characterizes how SYCL features perform when executing on modern vector
CPUs. A suite of microbenchmarks is used to isolate memory bandwidth, kernel scheduling, synchronization, reduction, atomic operations, and vectorization. The study compares AdaptiveCpp and DPC++ SYCL implementations, ahead-of-time and just-in-time compilation, OpenMP and OpenCL backends, and four CPU architectures: Intel Ice Lake, AMD Zen 2, Fujitsu A64FX, and AWS Graviton3. The results show that no single toolchain is best for all features. Ahead-of-time compilation with an OpenMP backend provides the strongest memory-bandwidth performance, whereas just-in-time compilation is generally more effective for kernel scheduling and synchronization. The study also identifies substantial architecture-dependent differences in vectorization and in the implementation of reductions and atomic operations. 

Second, the thesis studies whether best compile-time and runtime-tuned configurations are transferable across heterogeneous architectures. It introduces SCOuT, an automated framework that explores compiler flags and runtime parameters using Bayesian Tree-Structured Parzen Estimation and Tabu Search for a given objective. Ridge regression is used to estimate the influence of individual parameters. An evaluation of 26 SYCL workloads on AMD and Intel CPUs and NVIDIA and AMD GPUs shows that autotuning can provide substantial improvements, particularly on CPUs, but that the effect of individual compiler flags is rarely universal. Bayesian tuning provides the most stable improvements, while Tabu Search exposes influential parameter interactions at the cost of higher variance. Runtime choices, including the backend, thread placement, scheduling, and wait policy, can alter CPU performance by several times.

Together, the two studies show that achieving performance portability requires architecture-aware selection of compilation flows, backends, compiler
optimizations, and runtime policies. The thesis therefore motivates adaptive and explainable tuning methods that preserve a portable source representation while specializing its execution to the target system.

Heterogeneous Computing

Performance Portability

Autotuning

Search Algorithms

ED lecture hall, EDIT building.
Opponent: Olivier Aumage



Author

Hari Abram

Chalmers, Computer Science and Engineering (Chalmers), Computer Engineering (Chalmers)

Cross-Architecture Autotuning for Single-Source Heterogeneous Programming Models

Proceedings of the International Conference on Supercomputing,;Vol. PartF226351(2026)p. 856-867

Paper in proceeding

EPI SGA2

European Commission (EC) (101036168), 2022-01-01 -- 2024-12-31.

Principer för beräknande minnesenheter (PRIDE)

Swedish Foundation for Strategic Research (SSF) (DnrCHI19-0048), 2021-01-01 -- 2025-12-31.

Infrastructure

Chalmers Infrastructure for Mass spectrometry

C3SE (-2020, Chalmers Centre for Computational Science and Engineering)

Subject Categories (SSIF 2025)

Computer Sciences

Embedded Systems

Computer Systems

Publisher

Chalmers

ED lecture hall, EDIT building.

Opponent: Olivier Aumage

More information

Created

8/28/2026