Sampling with autoregressive clock jitter: Infinite-dimensional stability failure and finite-dimensional conditioning
Journal article, 2027

Motivated by recent developments in stochastic modeling of clock jitter in Analog-to-Digital Converters (ADCs) as autoregressive processes of order one (AR(1)), we study the density and stability properties of AR(1)-jittered sampling sets for Paley-Wiener signals. While the stability of sampling sets under i.i.d. perturbations of the integer lattice is classical, no analogous analysis was previously available for the correlated jitter observed in practice. We show that, despite having the correct asymptotic density both on average and almost surely, such sets almost surely fail to be stable sampling sets. We complement this negative result with a finite-dimensional analysis, providing explicit non-asymptotic conditions on the number of samples (Formula presented), the jitter standard deviation σξ and the confidence level (Formula presented) under which the smallest singular value of the (Formula presented) jittered sinc matrix exceeds a prescribed threshold ϵ with probability at least (Formula presented), so that the matrix is well-conditioned with high probability.

Stable sampling

Jitter

Autoregressive sampling

Author

Daniele Gerosa

Chalmers, Electrical Engineering, Communication, Antennas and Optical Networks

Thomas Eriksson

Chalmers, Electrical Engineering, Communication, Antennas and Optical Networks

Signal Processing

0165-1684 (ISSN)

Vol. 252 110952

Subject Categories (SSIF 2025)

Probability Theory and Statistics

Control Engineering

DOI

10.1016/j.sigpro.2026.110952

More information

Latest update

10/16/2026