Planar double gate SOI MOS devices; Fabrication by wafer bonding over pre patterned cavities and electrical characterisation
Journal article, 2007

Author

Ulf Södervall

Chalmers, Microtechnology and Nanoscience (MC2)

Solid State electronics

Vol. 51(2) 231-238

Subject Categories

Physical Sciences

More information

Created

10/6/2017