Substrate Noise Coupling Modelling in Mixed-Signal Integrated Circuits: A Surface Potential Approach
Licentiate thesis, 2004


Author

Simon Kristiansson

Chalmers, Microtechnology and Nanoscience (MC2), Solid State Electronics

An Accurate Pi Resistor Network for Substrate Coupling Estimation

21st Norchip Conference, Riga, Latvia,;(2003)

Paper in proceeding

Substrate Resistance Modeling for Noise Coupling Analysis

International Conference on Microelectronics Test Structures, Monterey, California, USA,;(2003)

Paper in proceeding

A Surface Potential Model for Predicting Substrate Noise Coupling in Integrated Circuits

Proceedings of the IEEE 2004 Custom Integrated Circuits Conference, CICC; Orlando, FL; United States; 3 October 2004 through 6 October 2004,;(2004)p. 497-500

Paper in proceeding

Resistance Modeling in 1D, 2D, and 3D for Substrate Networks

Physica Scripta,;Vol. T114(2004)p. 217-222

Journal article

Subject Categories

Electrical Engineering, Electronic Engineering, Information Engineering

Technical report L - School of Electrical Engineering, Chalmers University of Technology.: 503L

More information

Created

10/6/2017