Using storage elements with multiple delay values to reduce current spikes in digital circuits
Patent, 2001
Commonly clocked digital storage elements are provided with mutually different clock-to-output delays in order to timewise stagger their respective switching current spikes from one another, thereby "smearing" the aggregate current spike over time.
Inventor
Alf Larsson
Lars Svensson
Telefonaktiebolaget L M Ericsson
US6262612 (B1)
Subject Categories
Computer and Information Science