High Voltage Driver for RSFQ Digital Signal Processor
Journal article, 2007
We present an RSFQ based high voltage driver (HVD) developed for the first amplification stage of the hybrid
semiconductor-superconductor memory interface for the RSFQ
digital signal processor. Implementation of the driver allows to eliminate the impedance mismatch between the RSFQ and standard 50 Ω input of the semiconductor electronics and increases the signal-to-noise ratio to reach reliable signal transmission with sufficiently low bit error rate. This driver can produce output signal of NRZ pulses at 1 Gbit/s speed and 2.4 mV signal level that
is enough to be sensed by LNA on the further amplification stage. The driver was simulated numerically in PSCAN. The driver design is based on the serial stack of 8 SQUIDs with specially configured ground-cuts that form a quasi-coplanar line with 50 Ω impedance. The impedance of the driver has been extracted using 3D EM simulators that accurately take into account multilayer structure and capacitance to the ground. The circuit has been designed for the standard Hypres 4.5 kA/cm2 process. Numerical
simulation results are presented and discussed.